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Design of an Efficient Circuit for Data Rate Configuration in Power Amplifier Dedicated to Wireless Medical Applications
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Tayebeh Azadmousavi   , Esmaeil Najafi Aghdam * , Javad Frounchi |
| Microelectronic Research Lab., Faculty of Electrical Engineering, Sahand University of Technology, Tabriz , najafiaghdam@sut.ac.ir |
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Abstract: (9986 Views) |
| This paper presents a new circuit to configure power amplifier (PA) for return-to-zero on-off-keying (RZ-OOK) transmitters. The proposed PA works as a multimode structure with configurable data rate and output power. The programmable data rate function is achieved by duty cycle adjustment of input data and producing input RZ-data by a simple circuit, which leads to a linear scale of data rate with power consumption. This implies that any desired level of output power can be transmitted with different power consumption according to the power budget. The RZ-data is also utilized to perform the output power reconfiguration. The PA represents data rate of 0.3Mb/s to 3Mb/s and it can deliver output power level from -23dBm to 0dBm. During data rate adjustment, power consumption varies from 0.099mW to 0.99mW when the output power is 0dBm. Also, PA consumes 0.07mW to 0.99mW at the output power tuning range with a data rate of 3Mb/s. |
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| Keywords: Power Amplifier, PA, Configurable, RZ-OOK Modulation, Data Rate, Low Power Consumption |
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Full-Text [PDF 539 kb]
(3654 Downloads)
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Type of Study: Research |
Subject:
RF (Radio Frequency)
Received: 2019/04/22 | Accepted: 2019/08/16 | Published: 2020/09/6
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